Ceramic capacitors with built-in emi shield

ABSTRACT

This disclosure describes methods and systems for minimizing electromagnetic interference (EMI) noise emanating from a ceramic capacitor. The ceramic capacitor may include several terminations are on a bottom portion of the capacitor. The capacitor may be designed to include several capacitors formed from electrode layers. The capacitor may include a conductive coating on an outer peripheral portion. The coating may include conductive materials such as Cu, Ni, Ag, and/or graphite. Alternatively, some regions of the capacitor may include electrode layers built into the capacitor that are not associated with capacitors. In this manner, the ceramic capacitor may be free of the conductive coating to locations proximate to the described electrode layers not associated with capacitors. The conductive coating can act as an electromagnetic shielding to prevent the EMI noise from emanating outside the electromagnetic shielding. Also, the conductive coating can be electrically grounded (e.g., to printed circuit board) via terminals.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to U.S. Provisional Application Ser.No. 62/012,221 filed Jun. 13, 2014 entitled “CERAMIC CAPACITORS WITHBUILT-IN EMI SHIELD” which is incorporated herein by reference in itsentirety.

FIELD

The described embodiments relate generally to methods and systems forminimizing electromagnetic interference (EMI) noise emanating from anelectronic component, and more particularly to methods and systems forminimizing EMI noise emanating from a multi-layer ceramic capacitor(MLCC).

BACKGROUND

Ceramic capacitors in certain applications, such as DC (direct current)blocking, can be used in high speed interface, such as PCIe (PeripheralComponent Interconnect Express), USB (Universal Serial Bus), SATA(Serial ATA), HDMI (High-Definition Multimedia Interface), DP(DisplayPort), and TBT. The exposed pads and pins of these ceramiccapacitors can emit electromagnetic interference (EMI) emissions.Further, there may be several hundreds of these capacitors in a deviceor system, contributing to significant EMI noise within an electronicdevice which houses the capacitors.

SUMMARY

In one aspect, a multi-layered ceramic capacitor (MLCC) having abuilt-in electromagnetic interference (EMI) shield is described. TheMLCC may include a first layer and a second layer. The first layer andthe second layer may be selected from a group consisting of ceramic or adielectric material. The MLCC may further include a first electrodelayer and a second electrode layer defining a first capacitor. In someembodiments, the first electrode layer includes a first extension thatdefines a first electrode, and the second electrode layer includes asecond extension that defines a second electrode. In some embodiments,the first electrode and the second electrode extend beyond the firstlayer and the second layer. The MLCC may further include a thirdelectrode layer and a fourth electrode layer defining a secondcapacitor. In some embodiments, the third electrode layer includes athird extension that defines a third electrode, and the fourth electrodelayer includes a fourth extension that defines a fourth electrode. Insome embodiments, the third electrode and the fourth electrode extendbeyond the first layer and the second layer. The MLCC may furtherinclude a conductive coating applied to an outer peripheral region,wherein the conductive coating provides an EMI shield.

In another aspect, a system is described. The system may include amulti-layered ceramic capacitor (MLCC) having a built-in electromagneticinterference (EMI) shield as well as a printed circuit board (PBC). TheMLCC may include a first layer and a second layer. The first layer andthe second layer may be selected from a group consisting of ceramic or adielectric material. The MLCC may further include a first electrodelayer and a second electrode layer defining a first capacitor. In someembodiments, the first electrode layer includes a first extension thatdefines a first electrode, and the second electrode layer includes asecond extension that defines a second electrode. In some embodiments,the first electrode and the second electrode extend beyond the firstlayer and the second layer. The MLCC may further include a thirdelectrode layer and a fourth electrode layer defining a secondcapacitor. In some embodiments, the third electrode layer includes athird extension that defines a third electrode, and the fourth electrodelayer includes a fourth extension that defines a fourth electrode. Insome embodiments, the third electrode and the fourth electrode extendbeyond the first layer and the second layer. The MLCC may furtherinclude a conductive coating applied to an outer peripheral region,wherein the conductive coating provides an EMI shield. The PCB mayinclude several terminals to receive the first electrode, the secondelectrode, the third electrode, and the fourth electrode.

In another aspect, a method for forming a multi-layered ceramiccapacitor is described. The method may include positioning a firstelectrode layer and a second electrode layer between a first ceramiclayer and a second ceramic layer. The first electrode layer and thesecond electrode layer may define a first capacitor. The method mayfurther include positioning a third electrode layer and a fourthelectrode layer between the first ceramic layer and the second ceramiclayer. The third electrode layer and the fourth electrode layer maydefine a second capacitor. The method may further include coating thefirst layer and the second layer with a conductive coating. In someembodiments, the conductive coating provides an EMI shield the firstcapacitor and the second capacitor.

Other systems, methods, features and advantages of the embodiments willbe, or will become, apparent to one of ordinary skill in the art uponexamination of the following figures and detailed description. It isintended that all such additional systems, methods, features andadvantages be included within this description and this summary, bewithin the scope of the embodiments, and be protected by the followingclaims.

BRIEF DESCRIPTION OF THE DRAWINGS

The described embodiments and the advantages thereof may best beunderstood by reference to the following description taken inconjunction with the accompanying drawings. These drawings in no waylimit any changes in form and detail that may be made to the describedembodiments by one skilled in the art without departing from the spiritand scope of the described embodiments.

FIG. 1 illustrates an exploded view of internal and external structuresof a multi-layer ceramic capacitor (MLCC), in accordance with thedescribed embodiments;

FIG. 2 illustrates a top view of an embodiment of the MLCC shown in FIG.1;

FIG. 3 illustrates a bottom view of the embodiment of the MLCC shown inFIG. 1;

FIG. 4 illustrates a side view of the embodiment of the MLCC shown inFIG. 1;

FIG. 5 illustrates an isometric view of the multi-layer ceramiccapacitor (MLCC) prior to receiving an EMI shield (e.g., conductivecoating);

FIG. 6 illustrates an isometric view of the MLCC shown in FIG. 5, with abuilt-in EMI shield, provided by an external conductive coating, inaccordance with the described embodiments;

FIG. 7 illustrates a top view of an embodiment of a printed circuitboard;

FIG. 8 shows an embodiment of an MLCC having two capacitors;

FIG. 9 shows an embodiment of an MLCC having three capacitors;

FIG. 10 shows an embodiment of an MLCC having four capacitors;

FIG. 11 shows an embodiment of an MLCC having six capacitors;

FIG. 12 shows an embodiment of an MLCC having eight capacitors;

FIG. 13 illustrates a bottom view of an embodiment of an MLCC, showingrepresentative dimensions of an MLCC;

FIG. 14 illustrates a bottom view of an alternate embodiment of an MLCC,showing representative dimensions of an MLCC;

FIG. 15 illustrates a top view of an alternative embodiment of a PCBhaving four grounding terminals;

FIG. 16 illustrates an exploded view of internal and external structuresof an alternate embodiment of a multi-layer ceramic capacitor (MLCC), inaccordance with the described embodiments;

FIG. 17 illustrates a top view of an embodiment of the MLCC shown inFIG. 16;

FIG. 18 illustrates a bottom view of the embodiment of the MLCC shown inFIG. 16;

FIG. 19 illustrates a side view of the embodiment of the MLCC shown inFIG. 16;

FIG. 20 illustrates an isometric view of an embodiment of MLCC showinginternal features of the MLCC, such as a pair of electrode layers, priorto receiving a conductive coating, in accordance with the describedembodiments;

FIG. 21 illustrates an isometric view of the MLCC shown in FIG. 20, witha built-in EMI shield, provided by an external conductive coating, inaccordance with the described embodiments;

FIG. 22 illustrates a top view of an embodiment of a printed circuitboard, in accordance with the described embodiments; and

FIG. 23 illustrates a flowchart showing a method for forming amulti-layered ceramic capacitor, in accordance with the describedembodiments.

Those skilled in the art will appreciate and understand that, accordingto common practice, various features of the drawings discussed below arenot necessarily drawn to scale, and that dimensions of various featuresand elements of the drawings may be expanded or reduced to more clearlyillustrate the embodiments of the present invention described herein.

DETAILED DESCRIPTION

Representative applications of methods and apparatus according to thepresent application are described in this section. These examples arebeing provided solely to add context and aid in the understanding of thedescribed embodiments. It will thus be apparent to one skilled in theart that the described embodiments may be practiced without some or allof these specific details. In other instances, well known process stepshave not been described in detail in order to avoid unnecessarilyobscuring the described embodiments. Other applications are possible,such that the following examples should not be taken as limiting.

In the following detailed description, references are made to theaccompanying drawings, which form a part of the description and in whichare shown, by way of illustration, specific embodiments in accordancewith the described embodiments. Although these embodiments are describedin sufficient detail to enable one skilled in the art to practice thedescribed embodiments, it is understood that these examples are notlimiting; such that other embodiments may be used, and changes may bemade without departing from the spirit and scope of the describedembodiments.

This disclosure describes methods and systems for minimizingelectromagnetic interference (EMI) noise emanating from a ceramiccapacitor by using a built-in EMI shield. This creates a unique designof a ceramic capacitor module. The ceramic capacitor module withbuilt-in EMI shield may include several features, such as terminationsare on a lower, or base, region, of the capacitor. Also, the capacitorcan be designed to be an array of multiple capacitors. In the describedembodiments, the capacitors may include electrode plates perpendicularto the plane of the terminations of the capacitors. Further, a capacitormay include several surfaces coated with conductive material such as Cu,Ni, Ag, and/or graphite, etc. The coating functions as an EMI shield,and is electrically grounded after a capacitor is mounted to a printedcircuit board (PCB). In this manner, EMI noise emanating from exposedregions of the capacitor may be contained by the conductive coating.Such a conductive enclosure used to block electromagnetic field is alsoknown as a Faraday cage. Further, a ceramic capacitor module with abuilt-in EMI shield can also achieve improved volumetric efficiency,since extra external EMI shields are no longer needed.

FIG. 1 illustrates an exploded view of internal and external structuresof a multi-layer ceramic capacitor 100 (MLCC), in accordance with thedescribed embodiments. MLCC 100 shown in FIG. 1 includes two capacitors.First capacitor 120 includes two electrodes, 120A (+) and 120B (−), bothof which are denoted as shaded regions. Also, the plus (“+”) sign andthe negative (“−”) sign used through this detailed description refer toa positive electrode and a negative electrode, respectively. As shown,the two electrode layers, 120A and 120B, are sandwiched in betweenseveral layers, including first layer 110, second layer 112, and thirdlayer 114. In some embodiments, first layer 110, second layer 112, andthird layer 114 are formed from ceramic. In other embodiments, firstlayer 110, second layer 112, and third layer 114 are formed fromdielectric materials. Second capacitor 122 includes two electrodes, 122A(+) and 122B (−), also denoted as shaded regions. The two electrodelayers, 122A and 122B, are also sandwiched in between first layer 110,second layer 112, and third layer 114. In some embodiments, electrodelayers 120A, 120B, 122A, and 122B are metallic. In other embodiments,electrode layers 120A, 120B, 122A, and 122B are formed from metallicpaste. Also, MLCC 100 may include additional layers (not labeled)positioned between adjacent electrode layers of a capacitors. Theselayers may be made from any material previously described for firstlayer 110, second layer 112, and third layer 114.

Also, in some embodiments, these alternating layers of ceramic andelectrode layers can be stacked together, laminated, and cut (or diced)to form MLCC 100. FIGS. 2, 3 and 4 illustrate a top view, a bottom view,and a side view of MLCC 100, respectively, in accordance with thedescribed embodiments. In some embodiments, MLCC 100 is configured as arectangular prism, so each of the top, bottom, and side views displays arectangular face, as shown in FIGS. 2, 3, and 4. Also, in someembodiments, all the terminations are on a bottom portion of MLCC 100.For example, FIG. 3 shows these terminations labeled 120C, 120D, 122C,and 122D. Terminals 120C and 120D correspond to the positive (+) and thenegative (−) terminals, respectively, of first capacitor 120 (shown inFIG. 1). As such, terminals 120C and 120D are electrically coupled toelectrode layers 120A (+) and 120B (−), respectively, of first capacitor120. Similarly, terminals 122C and 122D correspond to the positive (+)and the negative (−) terminals, respectively, of second capacitor 122(shown in FIG. 1). As such, terminals 122C and 122D are coupled toelectrode layers 122A (+) and 122B (−), respectively, of secondcapacitor 122. Having all the terminations on the bottom face of theMLCC 100 allows for convenient connections to a printed circuit board(PCB) and also for convenient EMI shielding from other components on thePCB.

FIG. 5 illustrates an isometric view of MLCC 100 prior to receiving anEMI shield, with terminals 120C, 120D, 122C, and 122D in a lower regionof MLCC 100. In some embodiments, terminal 120C, 120D, 122C, and 122Dare formed from materials such as nickel (Ni) and tin (Sn). In otherembodiments, terminal 120C, 120D, 122C, and 122D are formed frommaterials such as silver (Ag) and palladium (Pd). Also, in someembodiments, MLCC 100 uses a land grid array (LGA). In otherembodiments, MLCC 100 uses a ball grid array (BGA). Also, in someembodiments, terminals 120C, 120D, 122C, and 122D are electricallyconnected to a PCB using lead-free solder. In other embodiments,terminal 120C, 120D, 122C, and 122D are electrically connected to a PCBusing a conductive adhesive.

FIG. 6 illustrates an isometric view of the MLCC 100 shown in FIG. 5,with a built-in EMI shield, provided by an external conductive coating240, in accordance with the described embodiments. As shown, conductivecoating 240 is applied to five faces of the MLCC 100 to form thebuilt-in EMI shield, or a Faraday cage. In some embodiments, thethickness of conductive coating 2e0 is approximately in the range of 2to 3 μm (micrometers). The five faces covered with the conductivecoating 240 include first face 250 (on a top region of MLCC 100), secondface 252, third face 254 (opposite second face 252), fourth face 256,and fifth face 258 (opposite fourth face 256). Only the face with theterminals configured to contact a PCB (i.e., sixth face 260 oppositefirst face 250), may be generally free of conductive coating 240.

In some embodiments, conductive coating 240 is a continuous coatingcovering all five faces. In some embodiments, conductive coating 240includes an exposed area or areas (i.e., uncoated openings) on at leastone of the aforementioned five faces having conductive coating 240.Further, an exposed area may include a dimension smaller than that ofthe wavelength of the EMI noise signal. In particular, the dimension ofthe exposed area(s) may be smaller than the shortest wavelength of theEMI noise signal. In some embodiments, conductive coating 250 includesexposed areas on at least one of the five faces that with conductivecoating 240 having a dimension smaller than 1/20 (or 5%) of thewavelength of the EMI noise signal. Further, in some embodiments,conductive coating 240 covers a portion of the bottom face. In thisregard, as shown in FIG. 6, conductive coating 240 may further includefirst terminal 242 and second terminal 244, both of which are configuredto provide an electrical grounding path for conductive coating 240. Bygrounding the conductive coating 240 via terminals 242 and 244, an EMIshield (or a Faraday cage) can be formed with the conductive coating240.

Conductive coating 240 may be formed from various materials. Forexample, in some embodiments, conductive coating 240 includes copper(Cu), silver (AG), nickel (Ni), and/or graphite. Also, in someembodiments, conductive coating 240 further includes tin (Sn).Conductive coating 240 may be applied by various techniques. Forexample, conductive coating 240 may be applied by spraying, dipping,roller coating, and/or other means generally known in the art forapplying a conductive coating to an electronic component. In someembodiments, the conductive coating 240 is applied to five faces (orsides) of the MLCC. In some embodiments, terminal 120C, 120D, 122C, and122D can include Ni/Sn or Ag/Pd. In some embodiments, MLCC 100 uses landgrid array (LGA). In other embodiments, MLCC 100 can use ball grid array(BGA). Further, in some embodiments, terminals 120C, 120D, 122C, and122D are electrically connected to a PCB using solder free of lead(Pb)-free solder. In other embodiments, a conductive adhesive is used toelectrically connect terminals 120C, 120D, 122C, and 122D.

FIG. 7 illustrates a top view of an embodiment of PCB 230. In someembodiments, a grounding terminal on PCB 230 provides a shielding to theexposed areas on the bottom face, or sixth face 260, of the MLCC 100(shown in FIG. 6). The terminations on the bottom face 260 of MLCC 100can couple to the terminals on a corresponding PCB, such as PCB 230. PCB230 includes terminals 220C (+) and 220D (−) for the first capacitor(e.g., first capacitor 120 in FIG. 1) that electrically couple withterminals 120C and 120D (in FIG. 6). PCB 230 also includes terminals222C (+) and 222D (−) for the second capacitor (e.g., second capacitor122 in FIG. 1) that couple with terminals 122C and 122D. Also, PCB 230includes ground terminals 232 and 234 which may electrically couple withother terminals of MLCC 100 (such as first terminal 242 and secondterminal 244 of conductive coating 240, shown in FIG. 6).

FIGS. 8-12 illustrate the structures of several MLCCs with an EMIshield, where the EMI shielding is provided by an external conductivecoating and the MLCC is composed of an array of multiple capacitors, inaccordance with the described embodiments. However, in some embodiments,additional electrode layers not used as capacitors may be used. Theseelectrode layers may serve as EMI shields, and will be discussed below.

FIG. 8 shows an embodiment of MLCC 310 having two capacitors, withterminals 312 (+) and 314 (−) associated with a first capacitor, andterminals 316 (+) and 318 (−) associated with a second capacitor. FIG. 9shows an embodiment of MLCC 320 having three capacitors, with terminals322 (+) and 324 (−) associated with a first capacitor, terminals 326 (+)and 328 (−) associated with a second capacitor, and terminals 330 (+)and 332 (−) associated with a third capacitor. FIG. 10 shows anembodiment of MLCC 340 having four capacitors, with terminals 342 (+)and 344 (−) associated with a first capacitor, terminals 346 (+) and 348(−) associated with a second capacitor, terminals 350 (+) and 352 (−)associated with a third capacitor, and terminals 354 (+) and 356 (−)associated with a fourth capacitor. FIGS. 8-10 illustrate how thecapacitors can be arranged in various manners. For example, FIGS. 8 and9 show capacitors in a vertical arrangement, that is, the capacitorsform a single column. However, FIG. 10 shows capacitors in a horizontalarrangement, that is, the capacitors form a single row.

FIG. 11 illustrates MLCC 360 having a row of six capacitors, with anexemplary first capacitor having terminals 362 (+) and 364 (−). FIG. 12illustrates MLCC 370 having a row of eight capacitors, with an exemplaryfirst capacitor having terminals 372 (+) and 374 (−). Although notshown, additional capacitors can be added to an array of capacitors onan MLCC. Generally, an MLCC can accommodate any number of capacitors.

FIG. 13 illustrates a bottom view of an embodiment of MLCC 400, showingrepresentative dimensions of MLCC 400. For example, MLCC 400 may includefirst dimension 402 approximately in the range of 0.8 to 1.2 mm. Firstdimension 402 may include some dimensions of conductive coating 440.MLCC 400 may further include second dimension 404 approximately in therange of 0.4 to 0.7 mm. Also, terminals 410 (+) and 412 (−) of acapacitor may be spaced apart by a distance 406 approximately in therange of 0.17 to 0.23 mm. It will be appreciated that this distance 406applies to terminals 414 (+) and 416 (−). Also, adjacent capacitors maybe spaced apart by a distance 408 approximately in the range of 0.17 to0.23 mm. Further, terminals 410, 412, 414, and 416 can be square-shapedpads having dimensions of approximately 0.20 mm×0.20 mm. In someembodiments, the surface finish of the terminal 410, 412, 414, and 416are formed from Cu/Ni/Sn. Terminals 410, 412, 414 and 416 may beconfigured to couple with, for example, terminals 220C, 222C, 220D, and222D (shown in FIG. 7). Also, in some embodiments, the EMI shieldingmaterials of the conductive coating 440 include a conductive copper (Cu)paint mixed with Ni and/or Sn. In this manner, conductive coating 440may be coupled to a terminal on a PCB (such as grounding terminals 232and 234, shown in FIG. 7) to provide an electrical grounding path forconductive coating 440.

FIG. 14 illustrates a bottom view of an alternative embodiment of anMLCC, showing representative dimensions of MLCC 500. For example, MLCC500 may include first dimension 502 approximately in the range of 0.8 to1.2 mm. First dimension 502 may include some dimensions of conductivecoating 540. MLCC 500 may further include second dimension 504approximately in the range of 0.6 to 0.9 mm. Also, terminals 510 (+) and512 (−) of a capacitor may be spaced apart by a distance 506approximately in the range of 0.20 to 0.24 mm. It will be appreciatedthat this distance 506 applies to terminals 514 (+) and 516 (−). Also,adjacent capacitors may be spaced apart by a distance 508 approximatelyin the range of 0.20 to 0.24 mm. Further, terminals 510, 412, 414, and416 can be square-shaped pads having dimensions of approximately 0.20mm×0.20 mm. In some embodiments, the surface finish of the terminal 510,512, 514, and 516 are formed from Cu/Ni/Sn. Also, in some embodiments,the EMI shielding materials of the conductive coating 540 includeconductive copper (Cu) paint mixed with Ni and/or Sn.

Conductive coating 540 may include terminals 542, 544, 546, and 548positioned on an outer peripheral portion of MLCC 500. Terminals 542,544, 546, and 548 may electrically couple to a PCB having correspondinggrounding terminals. In this manner, conductive coating 540 may becoupled to a terminal on a PCB to provide an electrical grounding pathfor conductive coating 540.

FIG. 15 illustrates a top view of an alternative embodiment of a PCB. Inthis embodiment, PCB 550 may include terminal 510A (+) and 512A (−)configured to electrically couple with terminals 510 and 512 (shown inFIG. 14), respectively, of a first capacitor. PCB 550 may furtherinclude terminal 510B (+) and 512B (−) configured to electrically couplewith terminals 514 and 516 (shown in FIG. 14), respectively, of a secondcapacitor. Also, PCB 550 may include grounding terminals 530A and 534Aconfigured to electrically couple with terminals 542 and 546,respectively, of conductive 540 (shown in FIG. 140. Also, PCB 550 mayfurther include grounding terminals 532A and 536A configured toelectrically couple with terminals 544 and 548, respectively, ofconductive 540 (shown in FIG. 14). Having four grounding terminalsinstead of two grounding terminals may provide for better grounding forconductive coating 540, which in turn may provide for better EMIshielding. In some embodiments, instead having four distinct terminals530A, 532A, 534A, and 536A, PCB 550 includes a grounding terminal havingfour sides that define a rectangle. In other words, the four distinctterminals 530A, 532A, 534A, and 536A may be combined to form a singlegrounding terminal. Generally, a single grounding terminal may be anyclosed polygonal or curved configuration.

FIG. 16 illustrates an exploded view of internal and external structuresof an MLCC with a built-in EMI shield, where a part of the EMI shieldingis provided by electrode plates, in accordance with the describedembodiments. Similar to MLCC 100 (in FIG. 1), MLCC 600 shown in FIG. 16includes two capacitors. First capacitor 630 includes two electrodelayers, 630A (+) and 630B (−), both of which are denoted as shadedregions. As shown, electrode layers 630A and 630B, are sandwiched inbetween first layer 610, second layer 612, and third layer 614. In someembodiments, first layer 610, second layer 612, and third layer 614 areformed from ceramic or a ceramic-like material. In other embodiments,first layer 610, second layer 612, and third layer 614 are formed fromdielectric materials. Second capacitor 632 includes two electrodelayers, 632A (+) and 632B (−), that are also sandwiched in between firstlayer 610, second layer 612, and third layer 614. Also, MLCC 600 mayinclude additional layers (not labeled and not shaded) positionedbetween adjacent electrode layers of the capacitors. These layers may bemade from any material previously described for first layer 610, secondlayer 612, and third layer 614.

In some embodiments, MLCC 600 includes additional electrode layers. Forexample, FIG. 16 shows electrode layers 620 and 640, which can act as abuilt-in EMI shield for those portions of MLCC 600 in which they cover.In FIG. 16, electrode layer 620 covers a surface or face of MLCC 600(similar to second face 252 shown in FIG. 6), while electrode layer 640covers a surface or face of MLCC 600 (similar to third face 254 shown inFIG. 6). In some embodiment, the electrode layers shown in FIG. 16 aremetallic. In other embodiment, the electrode layers shown in FIG. 16 areformed from a metallic paste.

These alternating layers of electrode and non-electrode (e.g., ceramic)layers can be stacked together, laminated, and cut (or diced) to formMLCC 600. FIGS. 17-19 illustrate a top view, a bottom view, and a sideview of the MLCC 600, respectively, in accordance with the describedembodiments. In some embodiments, MLCC 600 is configured as arectangular prism, so each of the top, bottom, and side views displays arectangular face, as shown in FIGS. 17-19, respectively. In someembodiments, all the terminations are on a bottom portion of MLCC 600.For example, FIG. 18 illustrates these terminations labeled 630C, 630D,632C, and 632D. Terminals 630C and 630D correspond to the positive (+)and the negative (−) terminals, respectively, of first capacitor 630(shown in FIG. 16). As such, terminals 630C and 630D are coupled toelectrode layers 630A (+) and 630B (−), respectively. Similarly,terminals 632C and 632D correspond to the positive (+) and the negative(−) terminals, respectively, of second capacitor 632 (shown in FIG. 16).As such, terminals 632C and 632D are coupled to electrode layers 632A(+) and 632B (−), respectively. FIG. 19 illustrates a side view of MLCC600 showing electrode strips 624 and 644, corresponding to electrodelayers 620 and 640, respectively (shown in FIG. 16). In someembodiments, electrode strips 624 and 644 are formed from a metallicmaterial or materials. Electrode strips 624 and 644 may be exposed toprovide an additional contact for grounding. Alternatively, electrodestrips 624 and 644 may be fully embedded with MLCC 600 such thatelectrode strips 624 and 644 are not visible.

FIG. 20 illustrates an isometric view of MLCC 600 showing internalfeatures of MLCC 600, such as electrode layers 620 and 640, prior toreceiving a conductive coating, in accordance with the describedembodiments. Also, MLCC 600 may include terminals 630C, 630D, 632C, and632D in a lower region of MLCC 600. Terminals 630C, 630D, 632C, and 632Dmay be formed from a material or materials previously described forterminals in a lower region of an MLCC 600. Also, MLCC 600 may includevarious arrangements previously described (e.g., LGA).

FIG. 21 illustrates an isometric view of the MLCC 600 shown in FIG. 20,with an EMI shield, provided by an external conductive coating 740, inaccordance with the described embodiments. As shown, FIG. 21 includesfirst face 750, second face 752, third face 754 (opposite second face752), fourth face 756, and fifth 758 (opposite fourth face 756). In someembodiments, conductive coating 740 may be applied to multiple surfacesor faces of MLCC 600. In the embodiment shown in FIG. 21, conductivecoating 740 is applied to a first face 750, fourth face 756, and fifthface 758. MLCC 600 may not require conductive coating 740 on second face752 and third face 754, due in part to electrodes layer 620 and 640.Also, in some embodiments, MLCC 600 may include exposed areas (i.e.,uncoated openings) similar to those previously described, and havingdimensions substantially similar to those previously described. Also, asshown, MLCC 600 includes sixth face 760 substantially free of conductivecoating 740. Sixth face 760 may be associated with a face having theterminals. Also, conductive coating 740 may include terminals 762 and764 configured to electrically ground conductive coating 740 and MLCC600.

FIG. 22 illustrates a top view of an embodiment of PCB 730. In someembodiments, a grounding terminal on PCB 730 provides a shielding to theexposed areas on the bottom face, or sixth face 760, of the MLCC 600(shown in FIG. 20). The terminations on the bottom face 760 of MLCC 600can couple to the terminals on a corresponding PCB, such as PCB 730. PCB730 includes terminals 730C (+) and 730D (−) for the first capacitor(e.g., first capacitor 630 in FIG. 16) that electrically couple withterminals 630C and 630D (in FIG. 20). PCB 730 also includes terminals732C (+) and 732D (−) for the second capacitor (e.g., second capacitor632 in FIG. 16) that couple with terminals 632C and 632D (in FIG. 20).Also, PCB 230 includes ground terminals 742 and 744 which mayelectrically couple with other terminals (such as first terminal 762 andsecond terminal 764 in FIG. 21).

Other embodiments of the ceramic capacitor module are also possible. Insome embodiments, the EMI noise emanating from a ceramic capacitorincludes 2.4 GHz and 5.0 GHz noise harmonics. In some embodiments, theconductive coating can include a light conductive polymer coating. Inother embodiments, the conductive coating can include a polymer coatingwith metal fillers. Still, in other embodiments, the conductive coatingcan include an electroplated coating. In some embodiments, acopper-based conductive coating can be used as EMI shielding for highfrequency EMI noise. In some embodiments, the conductive EMI shield canbe formed using material with a resistivity that provides for goodshielding against the anticipated frequencies of the EMI noise.

FIG. 23 illustrates a flowchart 800 showing a method for forming amulti-layered ceramic capacitor, in accordance with the describedembodiments. In step 802, a first electrode layer and a second electrodelayer are positioned between a first ceramic layer and a second ceramiclayer. The first electrode layer and the second electrode layer maydefine a first capacitor. In step 804, a third electrode layer and afourth electrode layer between the first ceramic layer and the secondceramic layer. The third electrode layer and the fourth electrode layermay define a second capacitor.

In step 806, the first layer and the second layer are coated with aconductive coating. In some embodiments, the conductive coating providesan EMI shield the first capacitor and the second capacitor. In caseswhere the MLCC is a six-sided structure, at least three sides mayinclude a coating on an outer peripheral portion. In some embodiments,electrode layers are embedded between the ceramic layers (e.g., firstceramic layer and second ceramic layer).

The various aspects, embodiments, implementations or features of thedescribed embodiments can be used separately or in any combination.Various aspects of the described embodiments can be implemented bysoftware, hardware or a combination of hardware and software. Thedescribed embodiments can also be embodied as computer readable code ona computer readable medium for controlling manufacturing operations oras computer readable code on a computer readable medium for controllinga manufacturing line. The computer readable medium is any data storagedevice that can store data which can thereafter be read by a computersystem. Examples of the computer readable medium include read-onlymemory, random-access memory, CD-ROMs, HDDs, DVDs, magnetic tape, andoptical data storage devices. The computer readable medium can also bedistributed over network-coupled computer systems so that the computerreadable code is stored and executed in a distributed fashion.

The foregoing description, for purposes of explanation, used specificnomenclature to provide a thorough understanding of the describedembodiments. However, it will be apparent to one skilled in the art thatthe specific details are not required in order to practice the describedembodiments. Thus, the foregoing descriptions of specific embodimentsare presented for purposes of illustration and description. They are notintended to be exhaustive or to limit the described embodiments to theprecise forms disclosed. It will be apparent to one of ordinary skill inthe art that many modifications and variations are possible in view ofthe above teachings.

What is claimed is:
 1. A multi-layered ceramic capacitor (MLCC) havingan electromagnetic interference (EMI) shield, the MLCC comprising: afirst layer and a second layer, the first layer and the second layerselected from a group consisting of ceramic or a dielectric material; afirst electrode layer and a second electrode layer defining a firstcapacitor, the first electrode layer having a first extension thatdefines a first electrode, the second electrode layer having a secondextension that defines a second electrode, wherein the first electrodeand the second electrode extend beyond the first layer and the secondlayer; a third electrode layer and a fourth electrode layer defining asecond capacitor, the third electrode layer having a third extensionthat defines a third electrode, the fourth electrode layer having afourth extension that defines a fourth electrode, wherein the thirdelectrode and the fourth electrode extend beyond the first layer and thesecond layer; a conductive coating applied to an outer peripheralregion, wherein the conductive coating provides an EMI shield.
 2. TheMLCC of claim 1, further comprising a third layer positioned between thefirst layer and the second layer.
 3. The MLCC of claim 2, wherein thethird layer is positioned between the first capacitor and the secondcapacitor.
 4. The MLCC of claim 1, wherein: the MLCC includes a firstface, a second face, a third face, a fourth face, a fifth face, and asixth face, the sixth face includes the first electrode, the secondelectrode, the third electrode, and the fourth electrode.
 5. The MLCC ofclaim 4, wherein the conductive coating covers the first face, thesecond face, the third face, the fourth face, and the fifth face.
 6. TheMLCC of claim 5, wherein the conductive coating comprises a terminalproximate to the sixth face, the terminal providing an electricalgrounding path for the conductive coating to a first grounding terminalof a PCB.
 7. The MLCC of claim 6, wherein the conductive coatingcomprises a second terminal proximate to the sixth face, the secondterminal providing a second electrical grounding path for the conductivecoating to a second grounding terminal of the PCB.
 8. The MLCC of claim5, further comprising a fifth electrode layer and a sixth electrodelayer, wherein the first electrode layer, the second electrode layer,the third electrode layer, and the fourth electrode layer are positionedbetween the fifth electrode layer and the sixth electrode layer.
 9. TheMLCC of claim 8, wherein the fifth electrode layer is proximate to thesecond face and the sixth electrode is proximate to the third face, thethird face opposite the second face, and where the second face and thethird face are free of the conductive coating.
 10. A system, comprising:a multi-layered ceramic capacitor (MLCC) having an electromagneticinterference (EMI) shield, the MLCC comprising: a first layer and asecond layer, the first layer and the second layer selected from a groupconsisting of ceramic or a dielectric material; a first electrode layerand a second electrode layer defining a first capacitor, the firstelectrode layer having a first extension that defines a first electrode,the second electrode layer having a second extension that defines asecond electrode, wherein the first electrode and the second electrodeextend beyond the first layer and the second layer; a third electrodelayer and a fourth electrode layer defining a second capacitor, thethird electrode layer having a third extension that defines a thirdelectrode, the fourth electrode layer having a fourth extension thatdefines a fourth electrode, wherein the third electrode and the fourthelectrode extend beyond the first layer; a conductive coating applied toan outer peripheral region, wherein the conductive coating provides anEMI shield; and a printed circuit board having a plurality of terminalsto receive the first electrode, the second electrode, the thirdelectrode, and the fourth electrode.
 11. The system of claim 10, theconductive coating comprising a first terminal and a second terminal,the plurality of terminals of the printed circuit board comprising afirst terminal and a second terminal, wherein the first terminal of theprinted circuit board receives the first terminal of the conductivecoating, and wherein the second terminal of the printed circuit boardreceives the second terminal of the conductive coating.
 12. The systemof claim 11, the plurality of terminals of the printed circuit boardcomprising a third terminal that receives the first electrode of thefirst capacitor, and a fourth terminal that receives the third electrodeof the second capacitor.
 13. The system of claim 10, further comprisinga fifth electrode layer and a sixth electrode layer.
 14. The system ofclaim 13, wherein the fifth electrode layer and the sixth electrodelayer define a third capacitor.
 15. The system of claim 13, wherein thefifth electrode layer and a sixth electrode layer provide an EMI shieldto the MLCC.
 16. A method for forming a multi-layered ceramic capacitor,the method comprising: positioning a first electrode layer and a secondelectrode layer between a first ceramic layer and a second ceramiclayer, the first electrode layer and the second electrode layer defininga first capacitor; positioning a third electrode layer and a fourthelectrode layer between the first ceramic layer and the second ceramiclayer, the third electrode layer and the fourth electrode layer defininga second capacitor; and coating the first ceramic layer and the secondceramic layer with a conductive coating, the conductive coatingproviding an EMI shield the first capacitor and the second capacitor.17. The method of claim 16, wherein the first electrode layer includes afirst electrode and the second electrode layer includes a secondelectrode, the first electrode and the second electrode extending beyondthe first ceramic layer and the second ceramic layer.
 18. The method ofclaim 16, further comprising positioning a third ceramic layer betweenthe first capacitor and the second capacitor.
 19. The method of claim16, wherein the conductive coating comprises a terminal that provides anelectrical grounding path for the conductive coating.
 20. The method ofclaim 16, wherein the conductive coating include a thickness less than10 micrometers.